发明名称 METHOD FOR MANUFACTURING INSULATED-GATE SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce on-resistance, wherein a high-concentration n type impurity region (proton layer) suppresses the advance of diffusion of a channel layer making it possible to form the channel layer shallowly. SOLUTION: In this manufacturing method, the high-concentration n type impurity region is prepared under the channel layer. As the n type impurity, proton is employed. The control of injection depth is easy for proton. Since the n type impurity layer obstructs the advance of diffusion of the channel layer, the depth of the channel layer can be controlled correctly by forming the n type impurity layer in the position where the desired depth of the channel layer is obtained. Thereby, since the channel layer and a trench can be formed so as to be required and sufficient depth, low capacitance, low on-resistance can be attained. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008078397(A) 申请公布日期 2008.04.03
申请号 JP20060256049 申请日期 2006.09.21
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 KUSHIYAMA KAZUNARI;OIKAWA SHIN;ISHIDA HIROYASU
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
代理机构 代理人
主权项
地址