| 摘要 |
A computer is provided to reduce a size of a clock generator and manufacturing cost at the same time by enabling the clock generator to output a PCI(Peripheral Component Interconnect) clock to a PCI device in response to a clock request signal of a plurality of PCI devices. A clock generator(10) has a clock request input pin receiving a first clock request signal and a clock source pin outputting a PCI clock, and outputs the PCI clock through the source clock pin when the first clock request signal is received through the clock request input pin. A plurality of PCI devices(20a,20b) has a clock input pin receiving the PCI clock output from the source clock pin of the clock generator and a clock request output pin outputting a second clock request signal, and operates based on the PCI clock. A controller(30) includes a plurality of input terminals(31a,31b) receiving the second clock signal from each PCI device, and an AND gate(31) outputting the first clock request signal to the clock request input pin of the clock terminal when the second clock request signal is received from at least one input terminal.
|
