| 摘要 |
A clock path circuit for a semiconductor IC and the semiconductor IC using the same is provided to supply a clock having a continuous clock propagation delay regardless of a clock transition type by compensating deviation of rising and falling transition delays of the clock transferred through a clock path. A clock source(51) generates a clock, and a clock path circuit(53) transfers the clock while compensating variation between rising and falling transition delays. A sub block circuit(52) operates by using the clock received through the clock path circuit. The clock path circuit generates the rising and falling transition delays alternatively, and is formed by connecting the even number of clock inverters(53-1~53-k) in series.
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