发明名称 WAFER LEVEL CHIP SIZE PACKAGE
摘要 A wafer level chip size package is provided to protect a semiconductor chip against the external shock by enclosing the rear side of the semiconductor chip with a cap, as well as making up for a thermal characteristic. A semiconductor chip(100) has a bonding pad(101), and a lower insulating layer(103) is formed on the semiconductor chip to expose the bonding pad. A redistribution layer(106) is formed on the lower insulating layer to be connected to the exposed bonding pad. An upper insulating layer(107) is formed on the lower insulating layer to expose a portion of the redistribution layer. A solder ball(108) is adhered to the exposed redistribution layer. A cap(109) is provided on one side of a groove corresponding to a size of the semiconductor chip to enclose the semiconductor chip.
申请公布号 KR100818101(B1) 申请公布日期 2008.03.31
申请号 KR20060110145 申请日期 2006.11.08
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YANG, SEUNG TAEK;CHUNG, QWAN HO
分类号 H01L23/02;H01L23/04 主分类号 H01L23/02
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