发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN PROGRAM AND SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit design method, a semiconductor integrated circuit design program and a semiconductor integrated circuit design apparatus that effectively reduce power supply noise due to switching of input/output buffers of a semiconductor integrated circuit. SOLUTION: The semiconductor integrated circuit design apparatus 10 comprises an impedance analysis part 233 for calculating frequency components of noise currents flowing to power terminals of input/output buffers, a noise analysis part 234 for calculating frequency characteristics of impedance between power wires in predetermined positions, and a power cell type selection part 235 for selecting first power cells 140 having a decoupling capacity or other second power cells 130 to be placed in an input/output circuit region 110 according to the noise current frequency components and impedance frequency characteristics. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008070924(A) 申请公布日期 2008.03.27
申请号 JP20060246303 申请日期 2006.09.12
申请人 NEC ELECTRONICS CORP 发明人 MASUMURA YOSHIHIRO
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F17/50
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