发明名称 MUTING CIRCUIT
摘要 A mute circuit is provided to suppress a noise sound at start and finish timings of a muting process by using a DC offset remover, a mute signal generator, and a selector. A DC offset remover(221) removes a DC offset component by passing the DC offset component of an AC input signal through an HPF(High Pass Filter) composed of a first operational amplifier. A mute signal generator(224) includes a second operational amplifier which generates a second DC offset at the same level as the first DC offset at the first operational amplifier and fixes an input of the second operational amplifier at the DC level. The mute signal generator outputs a mute signal representing the second DC offset. A selector(226) receives the AC input signal from the DC offset remover and the mute signal from the mute signal generator. During a normal operation, the selector selects the AC input signal, while the selector selects the mute signal during a muting process. The selector outputs the selected signal as an AC output signal.
申请公布号 KR20080027152(A) 申请公布日期 2008.03.26
申请号 KR20070095290 申请日期 2007.09.19
申请人 SANYO ELECTRIC CO., LTD.;SANYO SEMICONDUCTOR COMPANY LIMITED 发明人 WATANABE AKIO
分类号 H04R3/00 主分类号 H04R3/00
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