发明名称 |
Sequence independent non-overlapping digital signal generator with programmable delay |
摘要 |
<p>A circuit for generating non-overlapping clock signals includes a programmable delayed reference clock signals circuit to produce a plurality of delayed reference clock signals and a plurality of delay clock signal generators, operatively connected to the programmable delayed reference clock signals circuit, to generate non-overlapping clock signals. Each delay clock signal generator includes a latch or flip-flop to control a delay in a rising edge of a clock signal and to output a first signal, another latch or flip-flop to control a delay in a falling edge of a delayed clock signal and to output a first signal, and a logic circuit to generate the clock signal from the first and second signals. The latches or flip-flops independently control a delay in the rising edge of the clock signal in response to one of the plurality of delayed reference clock signals.</p> |
申请公布号 |
EP1903678(A2) |
申请公布日期 |
2008.03.26 |
申请号 |
EP20070253695 |
申请日期 |
2007.09.18 |
申请人 |
SENSATA TECHNOLOGIES, INC. |
发明人 |
YANG, JUNGWOOK;MUDUNURU, PAVAN;BROOKS, LANE |
分类号 |
H03K5/135 |
主分类号 |
H03K5/135 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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