LAYOUT METHOD OF SEMICONDUCTOR DEVICE WITH PROTECTION JUNCTION DIODE FROM DAMAGE DUE TO PLASMA CHARGING

摘要

A junction diode layout method for avoiding plasma damage in consideration of pattern repeatability is provided to eliminate the need of disposing a dummy gate poly layer by disposing gate poly regions at uniform intervals. An active layer is separately arranged in a unit layout with pattern repeatability wherein a plurality of active regions are formed in the unit layouts. A gate layer for forming a gate region is disposed on the active region. A doping region of a first conductivity type is disposed in at least one of the plurality of active region in a well layer constituting a well region of a second conductivity type. Outside the well region, a doping region of the second conductivity type is disposed in at least one of the plurality of active regions. A doping region of the second conductivity type for forming a junction diode(350) is disposed in at least one of the active regions of the first conductivity type and the second conductivity type, connected to the gate regions. In the well region on the edge of the unit layout, a doping of the first conductivity type for forming a well guard ring is disposed in at least one of the plurality of active regions.