| 摘要 |
A non-planar tri-gate p-MOS transistor structure with a strained channel region and a non-planar tri-gate integrated strained complimentary metal-oxide-semiconductor (CMOS) structure are described. A relaxed Si<SUB>1-x </SUB>Ge<SUB>x </SUB>layer is formed on the silicon-on-isolator (SOI) substrate. The relaxed Si<SUB>1-x </SUB>Ge<SUB>x </SUB>layer is patterned and subsequently etched to form a fin on the oxide. The compressively stressed Si<SUB>1-y </SUB>Ge<SUB>y </SUB>layer, having the Ge content y higher than the Ge content x in the relaxed Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer, is epitaxially grown on the fin. The Si<SUB>1-y </SUB>Ge<SUB>y </SUB>layer covers the top and two sidewalls of the fin. The compressive stress in the Si<SUB>1-y </SUB>Ge<SUB>y </SUB>layer substantially increases the hole mobility in a channel of the non-planar tri-gate p-MOS transistor structure.
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