发明名称 |
Process, voltage, temperature independent switched delay compensation scheme |
摘要 |
A delay compensation circuit for a delay locked loop which includes a main delay line having a fine delay line comprising fine delay elements and a coarse delay line comprising coarse delay elements, the main delay line being controlled by a controller, the delay compensation circuit comprising: an adjustable fine delay for modeling a coarse delay element, a counter for controlling the adjustable fine delay to a value which is substantially the same as that of a coarse delay element, a circuit for applying a representation of the system clock to the delay compensation circuit, and a circuit for applying the fine delay count from the counter to the controller for adjusting the fine delay line of the main delay line to a value which is substantially the same as that of a coarse delay element of the main delay line.
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申请公布号 |
US7349513(B2) |
申请公布日期 |
2008.03.25 |
申请号 |
US20030702502 |
申请日期 |
2003.11.07 |
申请人 |
MOSAID TECHNOLOGIES INCORPORATED |
发明人 |
BHULLAR GURPREET;ALLAN GRAHAM |
分类号 |
H03D3/24;H03L7/081;H03L7/089 |
主分类号 |
H03D3/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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