发明名称 |
Reconfigurable mixed-signal VLSI implementation of distributed arithmetic |
摘要 |
Disclosed herein is a reconfigurable mixed signal distributed arithmetic system including: an array of tunable voltage references operable for receiving a delayed digital input signal; a combination device in electrical communication with the array of tunable floating-gate voltage references that selectively combines an output of the array of tunable voltage references into an analog output signal; and a feedback element in electrical communication with the combination device, wherein the array of tunable voltages and the delayed digital input signal combine to perform a distributed arithmetic function and the reconfigurable mixed signal distributed arithmetic system responsively generates the analog output signal.
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申请公布号 |
US7348909(B2) |
申请公布日期 |
2008.03.25 |
申请号 |
US20060465192 |
申请日期 |
2006.08.17 |
申请人 |
GEORGIA TECH RESEARCH CORPORATION |
发明人 |
OZALEVLI ERHAN;HASLER PAUL;ANDERSON DAVID VERL;HUANG WALTER GEESHAN |
分类号 |
H03M1/66 |
主分类号 |
H03M1/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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