发明名称 Clock synchronization and fault protection for a telecommunications device
摘要 According to one embodiment, a telecommunications device includes a bus and a controller coupled to the bus that generates a system clock signal according to a first reference clock signal and communicates the system clock signal using the bus. The controller detects a loss of the first reference clock signal and, in response, continues generating the system clock signal, switches from the first reference clock signal to a second reference clock signal if the second reference clock signal is acceptable, and generates the system clock signal according to the second reference clock signal.
申请公布号 US7350116(B1) 申请公布日期 2008.03.25
申请号 US20040901835 申请日期 2004.07.28
申请人 CISCO TECHNOLOGY, INC. 发明人 PARRISH BRENT K.
分类号 G06F11/00 主分类号 G06F11/00
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