| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique by which peeling of a low-dielectric constant film can be prevented and the chip area can be reduced. SOLUTION: A semiconductor device has multilayer wiring which is composed of first to fourth layers of wiring which are covered with low-dielectric constant films 5a, 5b, 5c and 5d having specific inductive capacity equal to or lower than 3.0, for example, and fifth to eighth layers of wiring which are positioned in the upper part of the first to forth layers of wiring and are covered with insulating films having specific inductive capacity higher than 3.0. In this case, reinforcing patterns 6 are formed in the corners of a semiconductor chip by first to fourth layers of dummy wiring D1-D4 which are in the same layers as the first to fourth layers. Also, various mark patterns are formed in the region of the corners of the semiconductor chip where the reinforcing patterns 6 are formed by fifth to eighth layers of dummy wiring 7, 8, 9 and 10 which are in the same layers as the fifth to eighth layers of wiring. COPYRIGHT: (C)2008,JPO&INPIT
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