发明名称 SYSTEM AND METHOD FOR AUTOMATICALLY-DETECTING SOFT ERRORS IN LATCHES OF AN INTEGRATED CIRCUIT
摘要 A circuit and method for detecting soft errors produced in latches. An exemplary embodiment of a circuit includes a block of concatenated latches, each latch having a comparator, with an output from the final latch comparator representing a parity bit for the latch block. The circuit further includes a element to store the block parity bit, and a comparator for the block parity bit and stored parity bit. A latch soft error is detected by monitoring an output from the parity bit comparator, which signals an error when the latch block parity bit changes state.
申请公布号 KR100816130(B1) 申请公布日期 2008.03.21
申请号 KR20067006409 申请日期 2006.03.31
申请人 发明人
分类号 H03K19/003;G06F11/10;H03K3/037 主分类号 H03K19/003
代理机构 代理人
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