| 摘要 |
A device of protecting ESD for high voltage and a manufacturing method thereof are provided to suppress the concentration of current by implementing an STI at drain active and drift regions. A device of protecting ESD(ElectroStatic Discharge) for high voltage comprises a well region(110), a drift region(140), a gate pattern(150), and at least one STIs(Shallow Trench Isolation)(130). The well region is formed by implanting dopants between isolation layers(120) formed on a semiconductor substrate(100). The drift region is formed at an upper side of the well region. The gate pattern is formed by overlapping with a side of the drift region at an upper surface of the semiconductor substrate. The STIs are formed adjacent to the gate pattern at the drift region.
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