发明名称 MASK, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To form two patterns of wiring and a via hole using a mask in common when manufacturing a multilayer wiring structure in which a via hole is formed right under the wiring. <P>SOLUTION: A mask 100 is configured in such a manner that transmittance of a wiring pattern 2 formed on the mask 100 is made different from that of a via hole pattern 3 disposed right under the wiring pattern 2. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008064985(A) 申请公布日期 2008.03.21
申请号 JP20060241898 申请日期 2006.09.06
申请人 FUJITSU LTD 发明人 SUZUKI AKIYOSHI
分类号 G03F1/58;H01L21/3205;H01L21/768 主分类号 G03F1/58
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