| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To raise a writing speed while increasing storage capacity by suppressing influence due to capacity coupling to reduce interference of adjacent memory cell in a NAND type flash memory. <P>SOLUTION: A nonvolatile semiconductor memory device has a plurality of memory cell arrays 100 which have a plurality of word lines 130, a plurality of bit lines 140 and a plurality of memory cell transistors 112 having two or more numbers of storage statuses. The number of storage statuses stored in the memory cell transistor 112 differ by memory cell transistors 112 each other adjacent in a word line direction and a bit line direction, and writing is performed by page unit in even number bit line 140 and in the odd number bit line 140. The nonvolatile semiconductor memory device is characterized by controlling the potential of the bit line 140 to which writing is not performed during writing to a prescribed potential. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
