发明名称 DEBUG SYSTEM AND DEBUG CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a debug system and a debug circuit in which a tracing stack access and a normal data access are independently perforned so as to reduce the processing load of the debug system. SOLUTION: In the debug system equipped with a CPU as the object of debugging and a debug circuit, a CPU is configured to independently output the data access information of a CPU to be monitored by the debug circuit as information for stack access and information for data access excluding stack access, and the debug circuit is configured to independently generate and output the trace information of stack access from the information for stack access to be output by the CPU and the trace information of data access excluding the stack access from the information for data access excluding the stack access to be output from the CPU. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008065441(A) 申请公布日期 2008.03.21
申请号 JP20060240079 申请日期 2006.09.05
申请人 FUJITSU LTD 发明人 SATO TAKASHI;FUJITA ATSUSHI
分类号 G06F11/28 主分类号 G06F11/28
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