| 摘要 |
<p>A flash memory device is provided to perform a precise data reading operation by having the same interval of detection node loading time of a page buffer and by avoiding coupling capacitance between detection node interconnections. A memory cell array(100) includes a plurality of memory cells that are interconnected by a plurality of bitline pairs. A plurality of page buffers read the data of a selected one of the plurality of memory cells, respectively connected to the plurality of bitline pairs. Each page buffer includes a bitline select part(110), a transmission part(120) and a detection part(130). The bitline select part selects one of the bitline pairs and connects the selected bitline to a common node. The transmission part controls connection of the common node and the detection node. The detection part stores the data of the selected memory cell transmitted by the detection node. The transmission part and the detection part of the plurality of page buffers are located in an upper portion of a flash memory device, and the transmission part and the detection part of their adjacent page buffer are located in the lower portion of the flash memory device. The detection part can include a latch for storing data, an initializing circuit for initializing the latch in response to an initialization signal, and a sensing circuit for transmitting the data of the selected memory cell to the latch in response to a potential and a read signal of the detection node.</p> |
