发明名称 PHASE CHANGE MEMORY COMPRISING A LOW-VOLTAGE COLUMN DECODER
摘要 An integrated circuit includes a non-volatile memory having memory cells, a memory cell selection circuit having selection blocks, a first device supplying a first voltage applicable to memory cells, a second device supplying a second voltage applicable to memory cells. Each memory cell selection block includes a first selection sub-block to link the memory cell to the first device and a second selection sub-block to link the memory cell to the second device. The first sub-block includes MOS transistors of a first type of conductivity, and the second sub-block includes MOS transistors of a second type of conductivity. Application may be particularly but not exclusively to phase change memories.
申请公布号 US2008062806(A1) 申请公布日期 2008.03.13
申请号 US20070850510 申请日期 2007.09.05
申请人 STMICROELECTRONICS SA 发明人 RODAT CHRISTOPHE;GIOVINAZZI THIERRY
分类号 G11C8/12 主分类号 G11C8/12
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