发明名称 PARTIAL PAGE FAIL BIT DETECTION IN FLASH MEMORY DEVICES
摘要 A flash memory device, and a method of operating the same, is disclosed. The array of the flash memory device is arranged in pages of memory cells, each page having memory cells associated into groups of memory cells within the page for purposes of fail bit detection in program verification. For example, these groups may correspond to sectors within the page. In a programming operation, the verify process determines whether each group of memory cells within the page has fewer than a selected ignore bit limit for the sector. If not, additional programming is required for the insufficiently programmed cells in the page. By applying a fail bit detection threshold for each of multiple groups within the page, the efficiency of error correction coding in the flash memory is improved. A similar verify and fail bit detection approach may be used in erase and soft programming operations.
申请公布号 WO2008005735(A3) 申请公布日期 2008.03.13
申请号 WO2007US72012 申请日期 2007.06.25
申请人 SANDISK CORPORATION;HEMINK, GERRIT, JAN 发明人 HEMINK, GERRIT, JAN
分类号 G06F11/10;G11C16/10;G11C16/34 主分类号 G06F11/10
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