发明名称 |
Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage |
摘要 |
High performance non-volatile memory devices have the programming voltages trimmed for individual types of memory pages and word lines. A group of word lines within each erasable block of memory are tested successive program loops to minimize the problem of incurring excessive number of erase/program cycles. An optimum programming voltage for a given type of memory pages is derived from statistical results of a sample of similar of memory pages.
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申请公布号 |
US2008062785(A1) |
申请公布日期 |
2008.03.13 |
申请号 |
US20060531223 |
申请日期 |
2006.09.12 |
申请人 |
LI YAN;TU LOC;HOOK CHARLES MOANA |
发明人 |
LI YAN;TU LOC;HOOK CHARLES MOANA |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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