| 摘要 |
An apparatus for controlling a switch module in a memory is disclosed. A first pulse width adjusting unit receives an input instruction signal and adjusts a pulse width of the input instruction signal to generate an adjusted input instruction signal according to a first pulse width adjustment. A decoder receives an input address signal and the adjusted input instruction signal to generate a control signal utilized for controlling a turn-on period of the switch module. A second pulse width adjusting unit receives the control signal and adjusts a pulse width of the control signal to generate an adjusted control signal according to a second pulse width adjustment. A frequency detector controls the first and second pulse width adjusting units to set the first and second pulse width adjustments according to a frequency of a specific signal in the memory.
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