| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor testing device which applies test pattern data to many DUTs without complicating a layer constitution of a printed board. SOLUTION: A memory tester distributes test pattern data generated by a pattern generation part 10 into a plurality of DUTs, and outputs the data from a driver 30 individually. Each timing when the test pattern data are outputted from each driver 30 to the DUTs, is calibrated individually by a delay adjustment part 20. In a control part 21, own address is assigned to each delay adjustment part 20 by an own address setting pin 25, and address information extracted through a data bus 2 is compared with the set own address by a comparator circuit 24, and a set value of a delay amount is written in a set value storage part 23 in the case of mutual agreement. COPYRIGHT: (C)2008,JPO&INPIT
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