| 摘要 |
PROBLEM TO BE SOLVED: To provide: a system-on-chip (SOC) embodying a deep-stop (DP) mode capable of reducing a total leaking current of the SOC; and a power control method thereof. SOLUTION: This SOC has: a hard macro (HM) block; a power control part activating a DP enable (EN) signal and a DP mode state signal advertising a DP mode going-into during the DP mode; a multi-threshold (MT) CMOS logic circuit; a DP control logic circuit transmitting data output from a MTCMOS logic circuit to a HM block during the normal mode; and a MTCMOS control logic circuit activating a power control signal and a data control signal responding to an activation of the DP mode state signal, wherein the DP control logic circuit is so constituted that it responds to the activation of a DPEN signal, a DP mode state signal and a data control signal, latches data output from the MTCMOS logic circuit, responds to the activation of the DPEN signal and the power control signal, and blocks a power supply to the HM block. COPYRIGHT: (C)2008,JPO&INPIT
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