| 摘要 |
A differential-type high-speed phase detector is provided, and it includes a first DTHT module and a second DTHT module wherein these two DTHT modules are the same. The first DTHT module includes a first input for receiving a signal CK_ref, a second input for receiving a signal CK_fb, a first logic unit, a second logic unit, a third logic unit and an output. An imperceptible delay period difference is produced by the difference of the capacitance value between two capacitors to diminish the size of the dead zone of the phase detector in accordance with the prior art. As a result, the differential-type high-speed phase detector also keeps high speed and tri-state outputs such that the performance of the dead zone is enhanced.
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