发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, AND VIA HOLE ARRANGING PROGRAM
摘要 PROBLEM TO BE SOLVED: To solve the problem that the amount of a protecting material filling a via groove becomes uneven in conventional techniques owing to variance in arrangement density of via holes. SOLUTION: A semiconductor device 1 has a via hole 10, redundant via holes 20, and dummy via holes 30. The via hole 10 is connected to a lower-layer wiring 42 (first wiring), and an upper-layer wiring 44 (second wiring) provided to mutually different layers. The redundant via holes 20 and dummy via holes 30 are provided in a circumference of the via hole 10. The redundant via holes 20 are connected to both the lower-layer wiring 42 and upper-layer wiring 44. The dummy via holes 30, on the other hand, are connected to at most one of the lower-layer wiring 42 and upper-layer wiring 44. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008060398(A) 申请公布日期 2008.03.13
申请号 JP20060236513 申请日期 2006.08.31
申请人 NEC ELECTRONICS CORP 发明人 KANO ATSUSHI
分类号 H01L21/768 主分类号 H01L21/768
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