发明名称 Reducing Wake Latency Time For Power Conserving State Transition
摘要 For reducing wake latency time of an information handling system (IHS), a non-volatile random access memory (NVRAM) of the IHS is updated every time a main random access memory (RAM) of the IHS is changed or refreshed, thereby saving memory data. In response to a sleep event, the IHS is transitioned from a higher activity state to a sleep state, thereby removing power provided to the RAM. In response to a resume event, the IHS is restored back to the higher activity state from the sleep state. Upon restoring the power to the RAM, contents of the NVRAM are copied to the RAM to restore the memory data in a virtually instant manner.
申请公布号 US2008065845(A1) 申请公布日期 2008.03.13
申请号 US20060530829 申请日期 2006.09.11
申请人 DELL PRODUCTS L.P. 发明人 MONTERO ADOLFO SANDOR;CHAIKEN CRAIG LAWRENCE;SULTENFUSS ANDREW THOMAS
分类号 G06F12/16;G06F12/00 主分类号 G06F12/16
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