发明名称 SIMULATOR FOR VERIFYING COORDINATION BETWEEN HARDWARE AND SOFTWARE
摘要 PROBLEM TO BE SOLVED: To provide a simulator for verifying coordination between hardware and software based on a SystemC simulator capable of reducing processing time by reducing the overhead of context switching control. SOLUTION: The simulator is provided with time keepers for controlling the simulation times of a plurality of threads generated as simulation models of hardware and software. Each of the time keepers 12 has a variable X for retaining the simulation time Tsim of each thread, a variable Y for retaining integrated time Tsum, and an interrupt request queue Q for storing an interrupting method corresponding to interruption time, manages variables x, y and the queue Q according to six kinds of method calls from the threads, and calls the wait function of the SystemC simulator 11 if necessary. In this way the number of times that the wait function is called is reduced and the overall processing time can be reduced. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008059192(A) 申请公布日期 2008.03.13
申请号 JP20060234298 申请日期 2006.08.30
申请人 OKI ELECTRIC IND CO LTD 发明人 ITO NORIYOSHI
分类号 G06F11/26;G06F11/28;G06F17/50 主分类号 G06F11/26
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