发明名称 CALIBRATION CIRCUIT, SEMICONDUCTOR DEVICE WITH THE SAME, AND OUTPUT CHARACTERISTIC ADJUSTING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To improve accuracy of a calibration operation for adjusting output impedance. SOLUTION: A calibration circuit includes a replica buffer 110 for driving a calibration terminal ZQ, a reference voltage generating circuit 160 for generating a reference voltage VMID, a comparator circuit 151 for comparing a voltage appearing in the calibration terminal ZQ with the reference voltage VMID, an impedance adjusting circuit 141 for varying the output impedance of the replica buffer 110 on the basis of results of comparison by the comparator circuit 151, and a reference voltage adjusting circuit 170 for adjusting the reference voltage VMID. Since this configuration can offset the reference voltage VMID while considering a reference component existing between the calibration terminal ZQ and an external terminal, more exact calibration operation can be performed. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008060629(A) 申请公布日期 2008.03.13
申请号 JP20060231561 申请日期 2006.08.29
申请人 ELPIDA MEMORY INC 发明人 HOSOE YOSHIKI;KUROKI KOJI
分类号 H03K19/0175;G01R31/317 主分类号 H03K19/0175
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