| 摘要 |
<p>An integrated transistor device and a fabricating method thereof are provided to ensure easy implementation concerning junction leakage of the transistor by forming first and second trenches filled with dielectric on opposite sides of a pillar and extending a gate trench and a gate into the first and second insulating trenches. An integrated transistor device comprises a semiconductor substrate(1), a pillar, a gate trench, a first source/drain region(S), a gate dielectric(40), a gate(50), at least one second source/drain region, first and second insulating trenches(IT1,IT2), a conductive layer, a gate contact(CG), and first and second source/drain contacts(CS). The pillar is formed in the semiconductor substrate. The gate trench surrounds the pillar. The first source/drain region is formed in an upper region of the pillar. The gate dielectric is formed on a bottom of the gate trench, surrounding a lower region of the pillar. The gate is formed on the gate dielectric in the gate trench, surrounding the lower region of the pillar. The second source/drain region is formed on an upper region of the semiconductor substrate adjacent the gate trench. The first and second insulating trenches are filled with a dielectric formed on opposite sides of the pillar, wherein the gate trench and gate extend into the first and second insulating trenches. The conductive layer extending to the same height of the first and second insulating trenches is respectively formed in the first and second source/drain regions, wherein the gate trench is filled with an insulating layer extending to the height. The gate contact is formed on the insulating layer, routed therethrough. The first and second source/drain contacts are formed on the conductive layer.</p> |
