| 摘要 |
Disclosed is an interface arrangement (24) that creates an interface between a signal line (5) used for connecting external peripheral devices and a microcontroller bus (3). Respective data input interfaces and data output interfaces (1, 2; 4) that are used for connecting respective register devices (6,7) to the bus systems (3, 5) are interconnected via a buffer memory (8). Said buffer memory (8) is also coupled to a control means (9) for providing direct memory access (DMA). A control signal generator for flexibly generating control signals (10) is also provided. The inventive arrangement makes it possible to obtain a great data transmission rate without loading the microcontroller regarding the computing time when peripheral devices are triggered in a system on a chip. |
