| 摘要 |
A shift resister, a data driver having the same, and a liquid crystal display device are provided to decrease power consumption of the display device by processing data using a low frequency clock signal. A shift register includes a storage cell array(113) and a control array(111). The storage cell array includes storage cells storing plural serial data. The control array outputs a sampling signal which is sequentially shifted for every data transmission period, so that the storage cells sequentially store the data. The control array includes plural latch cells and plural sampling cells. The latch cells latch an external start pulse signal in response to one of the clock signal and an inverted clock signal. The sampling cells outputs the sampling signal which is sampled to be equal to one of low and high pulses from the clock signal, by using the latched start pulse signal which is supplied to the storage cells corresponding to the latch cells.
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