| 摘要 |
<p>A method for forming a floating gate in a flash memory device is provided to reduce a threshold voltage variation at the repeated program/erasing by forming a first polysilicon column of nano size. A tunnel oxide layer(101) and a first polysilicon layer(102) having cylindrical grain are formed on a semiconductor substrate(100). After an oxide layer is formed on the first polysilicon layer, the substrate is etched to reduce a grain size of the first polysilicon layer and thus forms a grain column of nano size. A second polysilicon layer(104) is formed on the entire surface of the substrate. The substrate is subjected to a chemical mechanical polishing process to expose the grain column.</p> |
