| 摘要 |
A memory device integrating an SRAM and a nonvolatile memory to a single chip using bit line sharing is provided to perform data transmission between two memory types easily through a shared bit line. At least a pair of differential flash cells has a first flash cell and a second flash cell. A source of the first flash cell is connected to a bit line and a source of the second flash cell is connected to a complementary bit line. Control gates of the first and the second flash cell are shared. Selection gates of the first and the second flash cell are shared, and drains of the first and the second flash cell are shared. At least one SRAM cell is connected between the bit line and the complementary bit line, and is connected to a word line.
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