SEMICONDUCTOR MEMORY DEVICE COMPRISING TRANSISTOR OF VERTICAL CHANNEL STRUCTURE

摘要

A semiconductor memory device having a vertical channel structure is provided to prevent an operating characteristic of the device from being deteriorated by pre-charging a bit line at both sides. A first memory cell array(70-1) and a second memory cell array(70-2) are separated. A low decoder(74) is disposed between the first and second memory cell arrays in the same direction as a column selection signal line(CSL), and a column decoder(72) is disposed on one side of the first and second memory cell arrays in the same direction as a main word line. A first word line driver(76-1) is disposed between the low decoder and the first memory cell array in the same direction as the column selection signal line, and a second word line driver(76-2) is disposed between the low decoder and the second memory cell array in the same direction as the column selection signal line. Each first and second memory cell array has memory cell array blocks(70-1j,70-2j), in which a junction(CJ) is disposed between adjacent memory cell array blocks.