摘要 |
A method is provided for forming a lightly-doped drain (LDD) area of a transistor by means of a single implant process. The method includes implanting a dopant under a process condition of an ;implantation energy of 10 KeV or less and a dose of 1.5x10<SUP>14 </SUP>to 3.0x10<SUP>14 </SUP>ions/cm<SUP>2</SUP>. The method makes it possible to simplify the process thereof, reduce the process time thereof, and improve the breakdown voltage of a device. The method can be used for 180 nm-grade or smaller flash memory.
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