| 摘要 |
The invention relates to a programme or electronic circuit for carrying out a method of modelling the switching activity of a digital circuit (3.3). This digital circuit (3.3) comprises cells (4.1-4.L) linked together by interconnections (6), said cells (4.1-4.L), switching at the instance at which at least one of their inputs changes state. Successive switchings of the cells of the circuit (3.3) occur during a clock period (Tclk) of this circuit, said clock period (Tclk) being the time for during which a signal applied to the circuit input is processed by the cells of the digital circuit (3.3), characterised in that the clock period is divided into time intervals [tk, tk+1] and comprisign the following steps: calculation of the number of cells likely to switch for each time interval [tk, tk+1] in the clock period using a matched statistical model and allocation of switching times to different cells of the digital circuit (3.3) knowing the number of cells likely to switch in the time intervals [tk, tk+1]. |
