发明名称 Semiconductor Integrated Circuit Device, Method For Testing The Semiconductor Integrated Circuit Device, Semiconductor Wafer And Burn-In Test Apparatus
摘要 A wafer test is performed to a wafer, and then a protective film is applied to part of a chip surface of each good chip other than terminals. For defective chips, a protective film is applied to an entire chip surface as well as terminals and, while keeping that state, a burn-in test is performed, thereby cutting off power supply and signal application to defective chips before burn-in test. Moreover, when a chip includes a self-test circuit to judge whether the chip is good or not and the chip is judged to be defective, the function of stopping an internal operation of the chip may be provided or a judgment signal may be transmitted to a burn-in test apparatus, thereby stopping power supply and signal application from the burn-in test apparatus. Thus, power supply and signal application to a chip judged to be defective after burn-in can be cut off.
申请公布号 US2008054260(A1) 申请公布日期 2008.03.06
申请号 US20050661680 申请日期 2005.06.01
申请人 ISHITOBI TAKASHI;OHTORI TAKASHI;TANAKA YASUSHI 发明人 ISHITOBI TAKASHI;OHTORI TAKASHI;TANAKA YASUSHI
分类号 H01L23/58;G01R31/02;G01R31/26;G01R31/28;G01R31/30;G06F19/00;H01L21/66 主分类号 H01L23/58
代理机构 代理人
主权项
地址