| 摘要 |
<p>A display driver circuit (100) for driving display elements in a row of a display array (18), includes an m input, n-bit input multiplexer (104A); a digital to analog converter (130A), and a one input, m output, analog output multiplexer (112A). A clock source (120), clocks the input and output multiplexers, to sequentially provide an analog output corresponding to one of said m n-bit inputs, at a corresponding one of said m outputs of said output multiplexer.</p> |
