发明名称 ANALOG/DIGITAL CONVERTER
摘要 PROBLEM TO BE SOLVED: To improve accuracy of A/D conversion with simple configuration. SOLUTION: When an analog input voltage Vin becomes equal with or higher than a reference voltage (+V2), a threshold voltage (+V1) is varied so as to invert output in a comparator 11a for each clock during fixed clocks by operating a binary voltage output circuit 13a. Thus, an encoder 16 alternately outputs "10" and "01" for each clock during the fixed clocks. Furthermore, when the analog input voltage Vin becomes lower than or equal with a reference voltage (-V2), a threshold voltage (-V1) is varied so as to invert output in a comparator 11b for each clock during fixed clocks by operating a binary voltage output circuit 13b. Thus, the encoder 16 alternately outputs "00" and "01"for each clock during the fixed clocks. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008054205(A) 申请公布日期 2008.03.06
申请号 JP20060230729 申请日期 2006.08.28
申请人 CANON INC 发明人 ISODA NAOKI
分类号 H03M1/14 主分类号 H03M1/14
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