CMOS-NAND GATE CIRCUIT USING 4-TERMINAL DOUBLE INSULATION GATE FIELD EFFECT TRANSISTOR

摘要

PROBLEM TO BE SOLVED: To provide a CMOS circuit for compatibly achieving a high-speed operation and low power consumption, particularly a 2-input CMOS-NAND gate circuit. SOLUTION: No matter which of the first gates of two vertically stacked 4-terminal double insulation gate field effect transistors a logical signal is impressed to, a differential waveform corresponding to it is generated in both second gates. Also, the differential waveform corresponding to the logical signal input to the first gate of the 4-terminal double insulation gate field effect transistor on the power source node side is generated in the second gate of the 4-terminal double insulation gate field effect transistor on the output node side as well. COPYRIGHT: (C)2008,JPO&INPIT