| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory system capable of suppressing latency with respect to a read command to the same degree as an NOR type flash memory while using an inexpensive NAND-type flash memory. <P>SOLUTION: When POR of a memory module 1 is performed, first parts P1a to Pna on pages P1 to Pn are read from the NAND-type flash memory 3, and written into a buffer memory 6 after prescribed error correction processing by an error correction part 7. When a controller 2 receives the read command of a page from a host system 8, a control unit 4 reads the first parts P1a to Pna on pages P1 to Pn from the buffer memory 6 while the NAND type flash memory 3 is on standby due to relatively large latency of the NAND type flash memory 3, and transfers data to the host system 8. <P>COPYRIGHT: (C)2008,JPO&INPIT |
