发明名称 Semiconductor memory and system
摘要 A word driver supplies a high level voltage to a word line when a memory cell is accessed and supplies low level voltage which is a negative voltage to the word line when the memory cell isn't accessed. A precharge circuit lowers a precharge voltage-supplying capacity to a bit line at least during a standby period when the memory cell is not accessed. A substrate voltage of an nMOS transistor with source or drain connected to the bit line is set to the low level voltage or lower of the word line. Therefore, when the word line and the bit line fails short and the voltage of the bit line changes to the low level voltage of the word line during the standby period, a substrate current can be prevented from flowing between the source of the nMOS transistor and a substrate or the drain and the substrate.
申请公布号 US2008056021(A1) 申请公布日期 2008.03.06
申请号 US20070892840 申请日期 2007.08.28
申请人 FUJITSU LIMITED 发明人 KOBAYASHI HIROYUKI
分类号 G11C7/00;G11C5/14;G11C7/10 主分类号 G11C7/00
代理机构 代理人
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