发明名称 METHOD, APPARATUS AND SYSTEM FOR REDUCING DC COUPLING CAPACITANCE AT SWITCHING AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To provide a digital amplifier for reducing a DC component of an amplified pulse width modulated signal, and to provide a method for reducing the DC component of the amplified pulse width modulated signal applied to a reference voltage generator and an input node of a load. SOLUTION: The digital amplifier includes a pulse width modulation signal generator, a filter, and a reference voltage generator. The pulse width modulation signal generator receives an input signal and outputs an amplified pulse width modulated signal. The filter filters the amplified pulse width modulated signal and provides the filtered amplified pulse width modulated signal to an input node of a load. The reference voltage generator provides a reference voltage, corresponding to an intermediate value between a maximum voltage and a minimum voltage of the filtered pulse width modulated signal, to a reference node of the load to reduce a DC component of the filtered amplified pulse width modulated signal. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008054320(A) 申请公布日期 2008.03.06
申请号 JP20070216123 申请日期 2007.08.22
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 YOU SEUNG-BIN;CHO YONG-JIN;LEE SOO-HYOUNG
分类号 H03F3/217;H03F3/34 主分类号 H03F3/217
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