| 摘要 |
A multi chip package is provided to enhance productivity by shortening electrical paths and to simplify the process by using a conventional molding process. A multi chip package includes a substrate(100), a first semiconductor chip(110), bonding wires(120), a first sealing part(140), via patterns(150), a second semiconductor chip(160), a second sealing part(180), and solder balls(200). The substrate includes first and second pads, and ball lands. The first semiconductor chip, which is attached on a surface of the substrate in face-up, includes plural bonding pads. The bonding wires connect electrically the bonding pads and the first pads of the substrate. The first sealing part seals the first semiconductor chip and bonding wires. The via patterns, which are formed at both edges of the first sealing part, are connected to the second pads. The second semiconductor chip, which is attached on a surface of the first sealing part in face-down, includes electrical connecting members for connecting the via patterns and bonding pads. The second sealing part seals a surface of the substrate including the first sealing part and second semiconductor chip. The solder balls are attached to ball lands formed at a lower surface of the substrate.
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