Programmable memory transistor

摘要

A programmable memory transistor (PMT) (10) comprising an IGFET and a coupling capacitor (38) in a semiconductor substrate (12). The IGFET comprises source and drain regions (20,22), a channel (24) therebetween, a gate insulator (28) overlying the channel (24), and a first floating gate (26) over the gate insulator (28). The capacitor (38) comprises a lightly-doped well (44) of a first conductivity type, heavily-doped contact and injecting diffusions (42,43) of opposite conductivity types in the lightly-doped well (44), a control gate insulator (48) overlying a surface region of the lightly-doped well (44) between the contact and injecting diffusions (42,43), a second floating gate (46) on the control gate insulator (48), and a conductor (50) contacting the lightly-doped well (44) through the contact and injecting diffusions (42,43). The first and second floating gates (26,46) are preferably patterned from a single polysilicon layer, such that the second floating gate (46) is capacitively coupled to the lightly-doped well (44), and the latter defines a control gate for the first floating gate (26).