| 摘要 |
A shift register is provided to enhance the voltage charge rate of a high level by removing charges in a parasite capacitor of a connection node in a low level. A shift register includes plural stages for generating output signals sequentially by synchronizing first and second clocks. Each of the stages includes an input unit(420), first and second drivers(430,440), an output unit(450), and a ripple transistor. The input unit outputs first and second voltages to first and second nodes(J1,J2) according to the output signals and first and second clocks. The first driver outputs the first voltage according to the first clock. The second driver outputs the second voltage according to output signals of the next stage, a voltage of the second node, and the output of the first driver. The output unit generates the output signals according to the voltages of the first and second nodes. The ripple transistor erases ripples of the first node according to the output of the first driver.
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