| 摘要 |
A semiconductor memory device is provided to prevent the generation of stuck phenomenon, as generating a delay locked clock in advance by reducing locking timing. A first delay locked loop circuit(100A) outputs a first delay locked clock in order to synchronize output timing of data with the edge of a system clock, through phase comparison between the system clock and a first comparison clock obtained by delaying the system clock for modeled delay time. A second delay locked loop circuit(100B) outputs a second delay locked clock in order to synchronize output timing of data with the edge of the system clock, through phase comparison between the system clock and a second comparison clock obtained by delaying the inverted clock of the system clock for the modeled delay time. A clock selection circuit(100C) outputs one of the first delay locked clock and the second delay locked clock as a reference clock synchronizing output timing of the data with the edge of the system clock.
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