| 摘要 |
A semiconductor memory device and an operation method thereof are provided to obtain the desired latching level of a global input/output line(GIO) during the period to latch the global input/output line after termination operation. A global data line transfers data between a core region and an interface region. An operation unit(100) performs termination operation of the global data line with an expected termination voltage level in response to a termination enable signal. A latch power supply unit(300) generates a latch voltage having constant level regardless of the level of an external power supply voltage. A latching unit(200) latches data loaded on the global data line finally with the latch power supply voltage level in response to the termination enable signal.
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